This invention relates to an error checking circuit for use at a receiving end of a digital communication system, such as a land mobile telephone communication system.
With a digital communication system, an error correcting code is indispensable because the system makes use of a transmission line, such as a radio channel, having a high bit error rate. As the error correcting code, a Bose-Chaudhuri-Hocquenghem (abbreviated to BCH) code is well known as a sort of cyclic codes in the art. It is already known that the BCH codes are classified into primitive and non-primitive BCH codes. A BCH code having a minimum intercode distance which is not less than four, has been used in the land mobile telephone communication system to transmit various kinds of control signals between a base station located at a preselected site and substations, such as automobiles. It is also known that use of a cyclic code of a greater minimum intercode distance enables not only correction of a single error but also correction of a t-tuple error, such as a double error, a triple error, or the like, t being representative of an integer greater than unity.
It is a recent trend that the single error alone is corrected while the t-tuple error is merely detected without correction, even when the BCH code is such that the correction of double errors is possible. This is because the triple error is often wrongly corrected as the double error despite the fact that the triple error actually occurs.
A conventional error checking circuit is operated in response to an input succession of bit sequences, each forming a preselected one of the primitive and the non-primitive BCH code, and comprises a divider for dividing each bit sequence by a generator polynomial for the preselected BCH code to watch a syndrome dependent on errors and a circuit for determining an error location in each bit sequence in accordance with the syndrome when the syndrome exhibits occurrence of the single error. The single error is corrected in each bit sequence with reference to the error location.
The conventional error checking circuit comprises a read-only memory (abbreviated to an ROM) as the circuit for determining the error location in each bit sequence. Such an ROM is programmed in advance to produce an error location signal representative of the error location, in response to the syndrome. With the conventional error checking circuit, the ROM must have a great memory bit capacity in order to carry out the above-mentioned operation, as will later be described with reference to one of a few figures of the accompanying drawing. Accordingly, the conventional error checking circuit is expensive.